Applied Technology: Divio’s NW701 DV Codec IC

As the video world migrates from analog to digital, some users assume that “digital video is digital video,” and that “going digital” will solve any problems caused by incompatible formats and interface protocols.
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As the video world migrates from analog to digital, some users assume that “digital video is digital video,” and that “going digital” will solve any problems caused by incompatible formats and interface protocols. Unfortunately, that’s not the case. Many digital video formats and protocols are incompatible with each other.

Examples of incompatible formats include the ITU-R 601/656 raw digitized format, the well-known, highly compressed MPEG-1 and MPEG-2 formats, and the IEC-16884 DV format. Examples of incompatible interfaces include the ANSI/SMPTE 259M serial digital interface (SDI) (with 48 kHz, 16-bit audio) and the IEEE-1394 serial interface. Of course, each of these standards has its proper place in the video world. For example, DV is an intra-frame standard in which each video frame is identified and coded, while MPEG is an inter-frame format in which one or more reference frames must be decoded before a given B or P frame can be displayed. Thus DV is better suited to tape-based acquisition and frame-accurate editing, and is steadily replacing Betacam SP (the component analog video) as the de facto standard in these areas. For distribution and broadcasting, MPEG-2 is the format of choice.

It makes sense to use different standards for different projects. It also makes sense to use them at different points in the same overall process. But getting incompatible digital devices (and perhaps older analog gear as well) to work together in a single system can ruin an engineer’s day.

To help manufacturers build devices that can successfully connect incompatible video components, Divio has developed a technology that finds common ground among the standards and helps bridge the gap between them. The Divio NW701 is a single-chip codec that converts ITU-R BT.601-2 to and from 28.8-Mbit DV in real time.

The integrated circuit (IC) is available in a 160-pin, low-profile, quad flat package (LQFP) that can be mounted on either the front or back of a printed circuit board. The codec built into the chip is fully “Blue Book” compliant and provides seamless connections to various video and audio encoders and decoders.

The chip supports recording at bit rates below DV’s standard 3.6 MBytes/s, including 3, 2.4, 1.8, 1.5 and 1 MBytes/s rates. The lower data rates permit recording to standard computer peripherals such as IDE and EIDE hard drives, and also allow faster previews during editing sessions.

The IC’s video bus has an ITU-R-656 (8-bit) mode with an optional handshake mode that can temporarily stall a video stream (in non-streaming mode) to allow external FIFO logic to catch up. The 16-bit asynchronous host bus uses a Motorola 68K-like interface with multiplexed address and data bits for register and DV FIFO access operations.

Functional block description

Video interface/shuffling. This block provides an industry standard ITU-R BT.656 (CCIR 656) interface for ITU-R BT.601-2 (CCIR 601) data, in either NTSC (4:1:1) or PAL (4:2:0) formats. It also provides multi-tap video filters to resample from 4:2:2 down to 4:1:1 or 4:2:0.

Shuffling maintains an even flow of video data for the compression logic to achieve maximum performance. To obtain stable quantization for the best overall performance, image blocks are shuffled using an external memory module (256k x 32 EDO DRAM).

DCT/IDCT. This block mathematically transforms the video stream, divided into 8x8-pixel blocks, using a fast discrete-cosine-transform (DCT) algorithm. For decompression, it uses the inverse discrete-cosine-transform (IDCT) algorithm. This converts pixel information into a DC coefficient and a series of 63 AC coefficients.

Encoder decision block. To improve coding efficiency, this block selects between 8x8 and 2x4x8 DCT modes. Generally, the 8x8 mode works best when a video stream contains fields with very small differences, while the 2x4x8 mode is used for fields containing large differences.

Entropy estimation. To improve coding efficiency, this block selects either the 8x8 or the 2x4x8 DCT mode based on the entropy calculation in each block. Class numbers are chosen according to the maximum AC coefficients.

Adaptive quantization. Higher compression is achieved when many DCT AC coefficients are close to zero. To achieve the 5:1 compression ratio specified by the DV standard, the adaptive quantization module selects the best quantization-weighting coefficients based on the class number and best-fit bit stream during the selection process. Zigzag Scanning. This process groups frequently occurring coefficients, increasing the efficiency of the run-length encoding.

Run-length coder(RLC). This block further compresses the bit stream after zigzag scanning by encoding the quantized coefficients and representing runs of consecutive zero coefficients with a “run-length” count symbol. The run-length decoder (RLD) restores the zeroes and amplitudes encoded in the bit stream.

Video packing/unpacking. This stage of compression packs the encoded video data as specified by the DV standard. Alternatively, it works as the first stage of decompression to extract video from the data stream.

Audio blocks. This provides an industry-standard I2S bus interface for an external audio codec. It also performs audio shuffling and audio bit conversion to support the standard 48-, 44.1- and 32-kHz ,16-bit, two-channel audio, as well as 32 kHz, 12-bit (“DV Compressed”) two- and four-channel audio modes.

System MUX. This block multiplexes and de-multiplexes video, audio and subcode DIFs into a legal DV bit stream as specified in the “Blue Book” DV standard.

How does all this fit into a real-world design? With Philips Semiconductors, Divio has released a reference design to help manufacturers develop new classes of DV appliances. The NW701-DAAD, nicknamed “Long Beach,” includes Philips’ SAA7112 and SAA7121 analog encoder and decoder to support composite video, S-video and analog audio, plus Philips chips to support an IEEE-1394/FireWire/i.LINK interface port.

It is a simple fact that one standard does not fit all needs. DV is a flexible, useful video and audio encoding format, with specific fields of use and specific applications. On the other hand, there is a plethora of video out there that is stored other digital and analog formats. The Divio NW701 codec not only helps to bridge digital formats, but also provides baseline connectivity to close the gap between old analog gear and new DV equipment.

Steve Musallam is director of marketing at Divio, of Sunnyvale, CA.