Last month, we looked at 1080p at various frame rates, including 1080p/60 (59.94) fps, which we know that we cannot currently transmit using the ATSC DTV broadcasting system. Although there is little equipment supporting it available, the interest in 1080p/60 as a future scanning format has been high enough to result in a SMPTE standard for an interface to accommodate it. This is a high-speed world to work in, challenging the limits of current technology, as will become apparent.
MAKING IT WORK
We saw in my previous column that 1920x1080i/29.97 fps, 4:2:2 component video at 10 bits generates a data rate of about 1.243 Gbps. This signal is carried in the SMPTE 292M HD-SDI, which has a nominal data rate of about 1.4835 Gbps for the 1/1.001 variant. 1920x1080p/59.94 fps has the same number of horizontal pixels and vertical lines as 1080i/29.97, but double the frame rate, so it generates a data rate just double that of 1080i/29.97, or about 2.5 Gbps. The 424M interface operates at double the frequencies of the 292M interface. The interface frequency of the 424M interface is about 2.97 GHz.
One way to carry 1080p/59.94 signals is by using two 292M interfaces in parallel. The 424M interface is effectively a "virtual" dual 292M interface. The 10-bit video data words are first arranged into two parallel data streams. The data words of the two virtual streams are then converted by time-division multiplexing into a single serial data stream that carries a word from data stream one, then a word from data stream two, then a word from data stream one… etc.
Both coaxial and optical interfaces are specified for the 424M interface. Because of the frequencies involved, the usable length of a given cable for such an interface is about half that for the 292M interface. The actual practical length depends on the quality and size of cable, but working in the 3 Gbps world will require careful planning, dictating the use of smaller cable for shorter runs, and larger cable for longer runs, in order to make the size of the overall cable pack as small as possible. The longest runs will require the optical interface, which has implications for performance and cost.
The 3 Gbps interface also raises the issue of jitter performance. Jitter is defined as the variations of the significant instants of a timing signal from their ideal positions in time. It effectively amounts to phase modulation of the signals, so that the time interval between a rising edge and a falling edge varies over time. This means that the rising and falling edges are not always in the ideal locations we would wish them to be. If we could actually see these signals and track their movements over time, we would see their rising edges and falling edges moving back and forth horizontally on the time axis.
Fig. 1: Eye diagram representation. Jitter causes leading and trailing edges to "move" back and forth on the horizontal axis, causing their lines to "fatten." We observe jitter using an "eye pattern" diagram, which displays the sequence of data signals, triggered by a synchronous clock signal or a divided synchronous clock signal, overlaid on each other. This is illustrated in Fig. 1, where, as the phase changes, the leading and trailing edges move back and forth on the time axis, as suggested by the arrows. The data signals, when healthy, take the form of square waves with rounded corners and somewhat sloped rising and falling edges, and the overall look of the display, if you have a vivid enough imagination, somewhat resembles an "eye."
The eye diagram shows us a number of aspects of the data signal, including rise and fall times, overshoots, frequency response, and many others, but we are principally interested in the display of jitter. If there were no jitter, the overlaid rising (and falling) edges would all neatly fall on top of one another, forming a thin line on the display. Because they do not fall neatly on top of one another, the line of rising (or falling) edges "smears" horizontally on the time axis, fattening the lines they describe on the display. The worse the jitter, the fatter the lines defined by the edges. The more the lines fatten, the more the "eye" closes, and the more difficult it becomes for the decoder to decide whether a given bit is a "one" or a "zero," so the more difficult it is to successfully decode the signal.
The impact of a given degree of jitter depends on the frequency of the signals, so jitter is typically expressed in "unit intervals." A unit interval (UI) is one bit time, or the duration of a single bit; the inverse of the frequency. For the SMPTE 259M SDI, the nominal interface frequency is 270 Mbps (270x106 bits per second). One unit interval is the inverse of 270 Mbps, or 3.7 nanoseconds (1 ns = 10–9 seconds), which may, for reasons of comparison, be expressed as 3700 picoseconds (1 ps = 10–12 seconds). For the SMPTE 292M, HD-SDI interface (1/1.001 variant), the nominal interface frequency is 1.4835 Gbps (1.4835x109 bits per second). One unit interval is the inverse of this frequency, or 0.67 ns, or 670 ps. For the 424M interface, the nominal interface frequency is 2.97 Gbps (2.97x109 bits per second). One unit interval, the inverse of this frequency, is 0.34 ns, or 340 ps.
There is more than one kind of jitter, with jitter classification depending on the frequency of the jitter. For the SMPTE standards, timing jitter has a lower frequency limit of 10 Hz. Any jitter components at a frequency below 10 Hz are called "wander," and, as video equipment can generally track these slow variations, wander is not addressed in the SMPTE standards.
Alignment jitter is jitter with frequencies above a frequency threshold related to the typical bandwidth of the clock recovery process, the threshold depending on the interface frequency. For 259M SDI signals, the lower threshold for alignment jitter is a jitter frequency of 1 kHz: jitter at frequencies between 10 Hz and 1 kHz is timing jitter; and jitter at frequencies higher than 1 kHz is alignment jitter.
For 292M and 424M signals, the lower threshold for alignment jitter is 100 kHz. For SMPTE 259M SDI signals, the maximum specifications for both timing jitter and for alignment jitter are 0.2 UI, or about 740 ps. For SMPTE 292M HD-SDI signals, the maximum specification for timing jitter is 1 UI, or about 670 ps; while the maximum specification for alignment jitter is 0.2 UI, or about 134 ps.
For the SMPTE 424M 3 Gbps interface, the maximum specification for timing jitter is 2 UI, or about 680 ps, about the same absolute time interval as the timing jitter for the 292M interface; while the maximum specification for alignment jitter is 0.3 UI, or about 68 ps. The test signal for all these specifications is a color bar signal. As a frame of reference for just how long these time intervals are, light travels 1 mm in about 3.3 ps.
We see that we are entering a rarified atmosphere when we contemplate working with a 3 Gbps interface. Things become significantly more critical, and more expensive. Cable lengths become so critical that for long runs, optical interfaces will be required. Clock signals must be as free of jitter as possible. Cable connectors and cables themselves have to be free of any damage or deterioration. Great care will have to be taken in all aspects of design and implementation of 3 Gbps facilities.
Randy Hoffner is a veteran TV engineer. He can be reached through TV Technology.
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