SPECIAL REPORT: Troubleshooting digital video signals

The transition from analog to digital offers broadcast fa-cilities many advantages to help maintain the quality of the video signal. Once a video signal is in the digital domain, it is immune to many analog phenomena that can diminish signal quality. But engineers need to change some of their familiar practices to cope with digital signals.

Today’s digital broadcast facilities require an arsenal of monitoring and test equipment and techniques to ensure signal integrity. Photo courtesy of Tektronix.

Watch out for the cliff

Unlike analog picture signals, which experience gradual degradation, digital pictures can experience sudden degradation. If a transmitted digital signal degrades beyond the point where you can guarantee its integrity, the received picture will likely disappear suddenly. This is called the “cliff effect.” For example, the serial digital interface (SDI) signal is robust, but the fact that the clock is embedded within the datastream can be its Achilles' Heel. If, for some reason, the receiver is unable to recover the clock, it won't recover the video data and, therefore, it won't display the picture. At a digital television facility, it is up to the engineer to maintain the health of the signal and prevent it from falling off the digital cliff.

Figure 1. The SDI check-field signal has two parts. One part tests equalizer operation; the other checks phase-locked-loop performance. In both parts of the test, Y occurs with the two chrominance components, while Y* occurs separately. Click here to see an enlarged diagram.

Stress test

To qualify the installation of a system, you can use a test-pattern generator to apply specific digital stress-testing signals to the system. Figure 1 shows the SDI check field, a specialized, two-part test signal. One part of the SDI check field tests equalizer operation by generating a sequence of 19 zeros followed by a one (or 19 ones followed by a zero). This occurs about once per field as the scrambler attains the required starting condition and will persist for the full line until terminated by the end-of-active-video (EAV) packet. This sequence produces a high DC component that stresses the analog capabilities of the equipment and the transmission system handling the signal. The other part of the SDI check-field signal checks phase-locked-loop performance with an occasional signal consisting of 20 zeros followed by 20 ones. This provides a minimum number of zero crossings for clock extraction.

These types of tests are useful while proving the conformance of your digital system or performing out-of-service testing. But, once the installation is complete, how can you monitor the health of your system to ensure that signals do not reach the digital cliff or that a piece of equipment isn't failing?

Error monitoring

Figure 2. The video-status screen available with various waveform monitors and SDI analyzers can provide status reports of the EDH condition and can log errors.Click here to see an enlarged diagram.

Error detection and handling (EDH) is based on inserting cyclic-redundancy-code (CRC) calculations for each field of video within the vertical ancillary data area. The signal generator sends separate CRCs for the full field and active picture, status flags, and other serial data through the transmission system. The deserializer then recalculates the CRCs. If the recalculated CRC values are not identical to the transmitted values, this indicates an error. Therefore, you can use this method for in-service monitoring of the SDI signal. Most video equipment now supports embedding of EDH within the vertical ancillary data area. Various waveform monitors and SDI analyzers can provide status reports of the EDH condition and can log errors, as shown in Figure 2. These devices present typical error-detection data as errored seconds over a period of time, along with time since the last errored second. If the monitoring equipment reports that EDH errors are occurring often, this is an indication that the SDI signal is getting close to the edge of the digital cliff. You should investigate the signal path further to troubleshoot the problem.

Isolating the problem(s)

To isolate such problems within a digital system, you'll need a waveform monitor that can display an eye diagram of the SDI signal. For accurate measurement, it is important to use a short length of high-quality cable. The monitor constructs the eye diagram by overlaying portions of the sampled datastream until enough data transitions are available to produce the 3-eye display, shown in Figure 3. On some instruments, it is also possible to correlate the eye display to data-word boundaries (10-word for SD and 20-word for HD). This feature is useful for detecting jitter patterns related to parallel-to-serial conversion.

Figure 3. A waveform monitor constructs an eye diagram by overlaying portions of the sampled datastream. Click here to see an enlarged diagram.

A serial receiver determines whether a signal is a “high” or a “low” in the center of each eye, thereby detecting the serial data. As noise and jitter in the signal increase through the transmission channel, they can close the eye, thereby reducing the usefulness of the received signal.

SMPTE standards specify requirements for the launch amplitude, jitter, overshoot, and rise and fall time of the signal, as Table 1 shows.


Signal amplitude is important because of its relation to noise and because the receiver estimates the required high-frequency compensation (equalization) based on the half-clock-frequency energy remaining as the signal arrives. Incorrect amplitude at the sending end could cause an incorrect equalization at the receiving end, resulting in signal distortions.

Rise and fall

The rise and fall times are defined between the 20 percent and 80 percent amplitude points, as Table 1 shows. Incorrect rise time could cause signal distortions such as ringing and overshoot. If the rise time is too slow, it could reduce the time available for sampling within the eye. Overshoot of the rising and falling edge must not exceed 10 percent of the waveform. Overshoot could be the result of incorrect rise time but, more likely, is caused by impedance discontinuities or poor return loss at the receiving or sending terminations.

Table1. SMPTE measurement specifications for the SDI signal’s launch amplitude, jitter, overshoot, and rise and fall times. Click here to see an enlarged diagram.

The jitters

Jitter is seen in the eye diagram as a horizontal thickening of the trace. As jitter increases, the opening of the eye shrinks until the receiver can no longer decode the data. Jitter is measured in unit intervals (UI) where 1UI is equivalent to the reciprocal of the clock period — 3.7ns for SD and 673.4ps for HD. The effect of jitter on the system also depends on the frequency of the jitter. SMPTE defines different frequency bandwidths for measuring jitter. Timing jitter provides an overall measure of the jitter present within the transmitted signal, while alignment jitter isolates jitter components that adversely affect the receiver's ability to recover the data.

Figure 4. This jitter display plots peak-to-peak jitter vs. time related to video line and field rates. It allows you to characterize jitter related to the video-signal timing. Click here to see an enlarged diagram.

The jitter display in Figure 4 plots peak-to-peak jitter vs. time related to video line and field rates. This display allows you to characterize jitter related to the video-signal timing. Many jitter-related problems are the result of transferring genlock reference jitter into the serial system. This type of jitter is typically between 20Hz and several hundred Hz. The phase-detection process used by genlock systems can also add noise that contributes to jitter in the 10Hz to 1kHz range. By using the appropriate bandwidth-limiting filter, you can include or reject specific jitter components from the jitter measurement.

The right stuff

The eye and jitter displays of the waveform monitor are the tools of choice for measuring the performance of a digitally transmitted signal. EDH, if implemented correctly in a system, can help monitor critical signal paths and warn of potential problems in the system. The key to a properly maintained system is a well-designed facility that uses and maintains the correct cable type, cable length and equipment termination.

Michael Waidson is an application engineer at Tektronix.