Since the launch of color TV in the 1960s, high-definition (HD) television has been one of the industry’s greatest advances. With the introduction to Blu-ray disks and HD-DVD players and the successful launch of HD ready flat-screen displays, consumer electronics are paving the way for this new experience to reach the mass market.

In the context of strong competition among these new devices, operators are launching new HD services. However, as bandwidth remains expensive, efficient MPEG-4/AVC compression is required to maintain a high picture quality that also has a 50 percent improvement over MPEG-2 compression rates.

With the debut of the Mustang chipset, Thomson has launched its fourth-generation of a video codec application-specific integrated circuit (ASIC). The company has a successful history in compression ASIC design: with best-in-class compression efficiency, Thomson’s third generation of MPEG compression ASICs has been chosen by leading broadcasters through the award-winning ViBE encoder solution and is running thousands of MPEG TV channels worldwide.

To these features the Mustang chipset adds MPEG-4/AVC compression encoding and decoding, with unmatched compression performance and flexibility for broadcasters, TV stations, and telcos that want to get the best of compression from their standard definition (SD) and HD pictures.

Mustang Target Applications SD and HD transmission Satellite, terrestrial, and cable broadcast; IPTV distribution Nonlinear editing Streaming over IP or satellite Transcoding HD recording and playback

In short, the Mustang ASIC is a complete system-on-chip solution for video compression and decompression for professional encoders and decoders, with a high level of programmability to address multiple applications such as digital broadcast over satellite, Internet Protocol-based television (IPTV) or nonlinear editing in a studio. It includes a set of applications that provide video pre-processing; MPEG-2, MPEG-4/AVC, and DV compression; or dual decoding of various compression formats from low-resolution pictures to HD signals.

The Mustang compression engine has been designed with two goals in mind: fulfill all customer needs and deliver a greater-than 50 percent compression efficiency over MPEG-2 systems. Based on this target, Thomson selected a unique design flow in which it developed optimum software and hardware simultaneously to achieve the best performance.

MUSTANG ARCHITECTURE

(click thumbnail) Mustang Architecture - Profiles and levels

The Mustang architecture blends high-performance compression, programmability, a versatile input/output design, and cutting-edge bandwidth, memory technologies, and processing capabilities—and more—into a chipset that is practical to use today as it is extensible for the future.

Computational Horsepower Delivers Superior Compression Performance

Over the next few years, video transmission and storage solutions will face two large changes in technologies: the deployment of HD television (HDTV), which will potentially increase bandwidth consumption by a factor of six compared to SDTV, and the introduction of new compression technologies such as MPEG-4/AVC that will require a 10-fold increase in computational power compared to MPEG-2 based solutions. But this is the reality the media and entertainment industries must face to get bandwidth- and storage-efficient HDTV solutions to market.

These increases in bandwidth consumption and computational power, compared to widely deployed MPEG-2 solutions, require a high level of performance in compression systems that can only be reached by dedicated architectures implemented in ASIC solutions.

Conventional MPEG-4/AVC implementations using DSP chips face a number of bottlenecks: they require too many DSP to achieve the necessary computational power, their memory access is limited, and the data exchanges between their DSP are difficult due to bandwidth limitations.

The Mustang chipset has been designed with MPEG-4/AVC HD compression—and decompression—in mind. It includes specific hardwired blocks that provide the necessary horse-power to get the best from the MPEG-4/AVC standard, provides large memory bandwidth access, and features high-speed input and output links.

Programmability Supports Processing Evolution and Compression

The Mustang ASIC addresses numerous applications, from broadcast to IPTV to HD video storage in a studio. Today, various video formats—picture sizes or compression standards—coexist in these different areas. Thus chipset programmability is critical: it allows for easy on-site adaptation of the ASIC to the various types of data it processes as well as for software optimization of its compression algorithms or standards. And as the needs of the market evolve, a hardware solution embedding the Mustang ASIC will be fully upgradeable on site, making the most of a customer’s investment.

Versatile I/O Structure Handles Multiple Streams Easily

To support applications such multiple decoding, multiple encoding, or transcoding, the Mustang ASIC features versatile I/Os that can be configured as high-speed video inputs and outputs. These interfaces are programmable and accommodate 32-bit wide video or data up to 108 Mhz, for a maximum data rate above 3 Gbit/s per interface.

With this capacity, the ASIC can handle multiple video HD inputs or multiple HD decoding requests. It can also handle easily such tasks as transcoding from MPEG-2 HD to MPEG-4/AVC HD.

DDR2 Chips, PCI Express Bus Eliminate Processing Bottlenecks

In the most demanding video applications, bandwidth and memory access is often one the biggest challenges. This is particularly true for compression: when the lowest bit rate is required, motion estimation with a very long excursion or vectors is a must. Under the MPEG-4/AVC standard, multiple reference pictures may be used to get the most accurate prediction possible.

With cutting-edge technologies such as DDR2 RAM chips and a PCI Express bus, the Mustang ASIC eliminates bandwidth and memory access problems. With four banks of DDR2 chips running at 533 MHz and 32-bit wide buses reaching a total of 32 Gb/s of bandwidth, it can handle the most complex MPEG-4/AVC predictions, or concurrent access to data for multiple decoding. The 10 Gb/s PCI Express bus extends the capacity of Mustang platform further by cascading several ASICs to tackle the most demanding application such as HDTV transcoding.

Multiple DSPs Offer Unequalled Performance

The Mustang ASIC features six dedicated and embedded video engines. Each includes specific video operands such as those to run 4x4 integer transform—a key task in MPEG-4/AVC compression—in two cycles. Running at 333 MHz, each DSP can perform 166 million of these transforms per second—or balance its activity between transform and other compression tasks.

All Mustang DSPs are fully programmable, and can run different tasks in parallel to reach performance at a level unequaled by other compression engines. This programmability also offers the flexibility to address various encoding or decoding algorithms, such as MPEG-4/AVC, MPEG-2, or DV100.

Hardware-Assisted Motion Estimation for Optimal Efficiency

Motion estimation has high impact on compression performance and places a high demand on processing power and, for these reasons, typically requires powerful hardware assistance. Software solutions are largely sub-optimal, and consume many computation cycles useful for other tasks.

The Mustang ASIC addresses this issue by using a dedicated hardware block with fully dedicated functions to calculate an 8x8 block difference in a clock cycle. As a result, it obtains very large motion ranges—horizontally and vertically—for multiple prediction frames as demanded by high-performance MPEG-4/AVC encoding.

Dedicated, Variable-Length Encoders Support Major Compression Standards

Variable length encoders (VLCs) and decoders (VLDs) handle bit operations that do not match up well with byte-based generic processors. The Mustang ASIC includes a set of VLCs and VLDs to support major encoding and decoding standards, including the CABAC code used in MPEG-4/AVC compression which is autoadaptive and whose results depend on the statistics of previously transmitted bits and codes.

High-Throughput Crossbar Enables Application Flexibility

To provide a flexible architecture that can handle all applications, all functional blocks of the Mustang ASIC are connected through a high-throughput crossbar. The data path of this crossbar can be fully adapted to a particular application—video processing, encoding, decoding—and provide high-speed memory access from any processing block.

ARM CPU Provides High-Level Control

Two ARM CPUs running at 533 Mhz are embedded in Mustang ASIC. One manages the chip, controlling the various internal blocks; is the master of communication to external devices; and provides the high-level control required for product integration.

The second ARM CPU is dedicated to high-level video processing tasks—pre-analysis, picture statistics, rate allocation in CBR or VBR modes, start and stop decoding, and compression control—offering a high-level language environment for software developers.

APPLICATION SUPPORT

The initial version of the Mustang ASIC will contain a number of software applications that make it possible to encode and decode many formats that include, but are not limited to:

• MPEG-2 MP@ML and MP@HL


• MPEG-4/AVC MP and HP@L3, MP, and HP@L4


• DV25, DV50, DV100

And while HDTV encoding is the first target application of the Mustang ASIC, it is not the only one. Multi-stream encoding and decoding are possible thanks to the ASIC’s combination of multiple inputs and outputs, making it possible to address dense encoding and decoding solution from mobile TV applications to those for HDTV.

As well, transcoding from MPEG-2 to MPEG-4/AVC (or vice-versa) is one area where the excellence of the Mustang will pave the way to high-performance turnaround systems in HD television.

The Mustang ASIC provides programmability at the application level, in a high-level language to support the rapid development of new applications, and at the lower level to enable the chipset to evolve with the development of new compression tools. This flexibility ensures the ability of the chipset to meet the new compression challenges that lie ahead for the media and entertainment industries.

SPECIFICATIONS

Inputs

• 2 inputs fully programmable as stream or video– up to 108 MHz, 32 bits

Outputs

• 3 outputs fully programmable as stream or video– up to 108 MHz, 32 bits

Memory

• Up to 4 banks of DDR2, 533 MHz, 32 bits wide System-I/O


• 100Base-T Ethernet, 4x2.5 Gb/s PCI Express usable for video and data

Compression format support:

• MPEG-2 MP@ML


• MPEG-2 MP@HL


• MPEG-4/AVC MP@L3


• MPEG-4/AVC MP@L4


• DV25, DV50, DV100

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